1. Technical Field
The present invention relates generally to semiconductor device fabrication, and more particularly, to methods and apparatus for irradiation assisted reactive ion etching.
2. Related Art
Etch uniformity continues to be an important concern in the semiconductor device fabrication industry. As semiconductor devices are further miniaturized, etch uniformity requirements are also scaled proportionately. Unfortunately, current etch processes are incapable of achieving the required image tolerance values necessary for continued scaling. New challenges presented by smaller scale semiconductor devices exist in a number of forms. In one example, finFET devices might be used to enhance device current while reducing leakage values. The width of the finFET silicon mandrel is a critical parameter for the control of finFET device characteristics. Conventionally, the mandrel is formed with a long silicon etch, which can be sensitive to pattern factors, loading factors, and across wafer variations.
One common etching process is reactive ion etching (RIE). RIE processes often exhibit loading and pattern sensitivities that degrade the etch uniformity. In particular, conventional RIE processing requires plasma polymer passivation to protect sidewalls of any etched silicon structure during the etch process. The plasma polymer passivation processes typically exhibit pattern loading and pattern pitch sensitivities, which induce linewidth variation within a chip and across a substrate. One area in which this problem presents a challenge is in forming a fin structure of a finFET because the fin structure requires a deep etch of silicon, and also requires very uniform image width across a chip and across a wafer, independently of pattern density or pattern pitch. Conventionally, changes to tool configurations have been used to modify or enhance RIE etch uniformity. Tool configurations may include, for example, electrode types and powers, gas flow distributions, gas pressures, etc. Unfortunately, it is unlikely that tool configuration changes will allow for continued scaling progression for RIE processing. In another approach, optical etch processes have been used in the presence of reactive gases to etch substrates. However, these techniques are also unlikely to be able to be used with the next generation of smaller scale semiconductor devices. In particular, these etching processes are not directional, and accordingly, not as precise as required.
In view of the foregoing, a new etch method with improved etch uniformity during the formation of structures such as finFETs is desired.